Miniaturization of devices such as semiconductor devices is being accelerated because of improved performance and functionality (high speed operation, low power consumption and so on) and low cost. Lithography supports such miniaturization, whereas transfer mask technology is the key technology along with exposure devices and resist materials.
In recent years, the DRAM half pitch (hp) 45 nm to 32 nm generation in semiconductor device design specifications is being developed. This corresponds to ¼ to ⅙ of a wavelength of 193 nm of ArF excimer laser exposure light. In particular, the generations after the hp 45 nm generation is insufficient when used only with the application of conventional resolution enhancement technology (RET) such as phase shift, oblique incidence illumination and pupil filtering, and an optical proximity correction (OPC) technology, and accordingly requires a super high numerical aperture (NA) technology (immersion lithography).
However, circuit patterns required for semiconductor manufacture are sequentially exposed to semiconductor wafers through a plurality of photomasks (reticles). For example, a reduction projection type exposing device (exposurer) set with a certain reticle mainly includes a type of projectively exposing repeated patterns by displacing regions to be projected on a wafer being displaced from each other in turn (step and repeat type) or a type of projectively exposing repeated patterns by synchronously scanning reticles and wafers to a projection optical system (step and scan type). These types are used to form a predetermined number of integrated circuit chip regions in a semiconductor wafer.
A photomask (reticle) has a region where transfer patterns are formed and also peripheral regions. The peripheral regions, which are surrounding areas along the four sides of the photomask (reticle), are exposed and transferred in a superimposed manner in order to increase the number of integrated circuit chips to be formed when transfer patterns on the photomask (reticle) are sequentially exposed with regions to be projected on a wafer while being displaced from each other in turn. Typically, a mask stage of an exposurer is provided with a shielding plate to shield irradiation of exposure light to the peripheral regions. However, shielding by exposure light using the shielding plate has problems in that it limits position precision and light diffraction effects, thus making it difficult to avoid leakage of exposure light (being referred to as “light leakage”) into the peripheral regions. If the light leakage into the peripheral regions transmits through the photomask, there is a fear of sensitizing resists on the wafer. For the purpose of preventing the resists on the wafer from being sensitized due to such superimposing exposure, a light shielding band (a band of light shielding material or a ring of light shielding material) is formed in the peripheral regions of the photomask during mask manufacturing. In addition, in an area where the light shielding band of the peripheral regions is formed, a typical optical density (OD) value is preferably 3 or more, necessarily at least 2.8 or so in order to suppress sensitization of the resists on the wafer due to the superimposing exposure.
In the case of a binary mask, a light shielding film has high light shieldability and accordingly has a light shielding film pattern formed in a transfer pattern area while playing a role of a light shielding band in peripheral regions of the transfer pattern area.
Thinning the light shielding film decreases an optical density (OD) value. For a chromium-based light shielding film, a minimum total film thickness is required to be 60 nm or so in order to achieve OD=3 that is generally required, thus making it difficult to significantly thin the film (for example, see paragraph [0005] in Patent Document 1).
Even in the case of a so-called binary type photomask including a light shielding film having a multilayer structure composed of MoSi-based materials, for example, a light shielding film having a multilayer structure composed of main MoSiN light shielding layer/MoSiON anti-reflection layer formed on a substrate, a minimum total film thickness of 60 nm or so is required in order to achieve OD=2.8 which is typically required, thus making it difficult to significantly thin the film (for example, see Patent Document 2).
Lithographic techniques of forming minute and highly-dense transfer patterns on one transfer mask have begun to reveal limitations. A double patterning/double exposure technique has been developed as one of solution to the problems of the lithographic techniques. The double patterning/double exposure technique divides one minute and highly-dense transfer pattern into two relatively sparse patterns (first pattern and second pattern) and prepares a transfer mask for each of the two patterns. This double patterning/double exposure technique is a lithographic technology of transferring minute and highly-dense transfer patterns onto resists on a wafer using a set of two transfer masks.